1. Field of the Invention
The present invention relates to a method of making of a semiconductor device and, more particularly, to gettering of a metal impurity.
2. Description of the Related Art
Conventionally, the memory cell of a DRAM is constituted by a transistor and a capacitor. The capacitor of the memory cell is formed in a trench formed in a substrate (as the memory cell of a DRAM, see Transactions on Electron Devices, Vol. 35, No. 8, August 1988, pp. 1257-1263).
A conventional method of making a semiconductor device will be briefly described.
As shown in FIG. 3, a silicon oxide film 2 and a silicon nitride film 3 are formed on a semiconductor substrate 1. After patterning the silicon oxide film 2 and the silicon nitride film 3, the silicon nitride film 3 is used as a mask to form a trench 4 in the substrate 1 by using, for example, an anisotropic etching method (to be referred to as an RIE method hereinafter). According to this etching method, the substrate 1 is etched, and at the same time, the electrode (consists of a metal) of the etching apparatus is sputtered. For this reason, a very small amount of metal impurity is contained in the etching gas. These metal impurity are introduced into the substrate 1 (in more detail, in the side wall portion of the trench 4 formed in the substrate 1; indicated by x in FIG. 3). A silicon oxide film 5 is then formed on the inner wall and the bottom surface of the trench 4.
As shown in FIG. 4, the silicon oxide film 5 is etched and removed by the RIE method only at the bottom portion of the trench 4. A polysilicon film 21 is then deposited on the bottom and the side wall portions of the trench 4. By using, for example, a phosphorus diffusion method, the polysilicon film 21 is doped to form an n-type film, and at the same time, an n-type diffusion layer 22 is formed on the bottom portion of the trench 4. The polysilicon film 21 is formed into a sheath-like shape, and a composite film 23 consisting of SiO.sub.2 /SiN is then formed in the trench 4. The trench 4 is filled with an n-type polysilicon film 6. As a result, a sheath type capacitor constituted by the polysilicon film 6, the composite film 23, and the polysilicon film 21 is formed.
The surface of the polysilicon film 6 is oxidized to form a silicon oxide film 7. A MOSFET 8 of a memory cell is formed in the active region, and at the same time, the electrode (polysilicon film 6) of the capacitor is electrically connected to the source/drain region of the MOSFET 8 by using an appropriate method. The gate electrode of the MOSFET is connected to a word line, and a bit line and a metal wiring are formed, thereby completing a DRAM.
As described above, the trench 4 is formed in the substrate 1 by the RIE method. In this case, the electrode of the etching apparatus is sputtered. For this reason, a very small amount of metal impurity is contained in the etching gas, resulting in doping of the metal impurity in the substrate 1.
Therefore, as shown in FIG. 4, in the diffusion layer formed near the side wall of the trench, i.e., in the junction surface of the source/drain region of the MOSFET constituting the memory cell of the DRAM, a leakage current occurs to degrade reliability of the element.